Successive cancellation list-based decoder and decoding method thereof

ABSTRACT

A successive cancellation list-based decoder and a decoding method thereof are provided. In the method, an error check is performed on a set of data bits. A data unit includes the set of the data bits and at least one first check bit. Part of the set of data bits are considered as at least one second check bit. At each of the second check bits, its previous error-check result are verified, where the verified result is related to a comparison between each of the previous first check bits and a value obtained through a function calculation on corresponding data bits. The verified result at each of the second check bits determines whether to continue decoding of the set of data bits or to early terminate the decoding process. The method is able to increase the probability for early termination of the decoding process and to improve the decoding efficiency.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application no.108137602, filed on Oct. 18, 2019. The entirety of the above-mentionedpatent application is hereby incorporated by reference herein and made apart of this specification.

TECHNICAL FIELD

The disclosure relates to a decoding technique, and more particularly,to a successive cancellation list (SCL)-based decoder and a decodingmethod thereof.

BACKGROUND

A polar code has recently been adopted by the 3rd Generation PartnershipProject (3GPP) as a control channel coding for uplink and downlinktransmission in the Enhanced Mobile Broadband (eMBB) scenario of the 5thGeneration (5G) mobile communications. The technical literature of 3GPPstates that, in order to reduce the latency of decoding time and a powerconsumption, an early termination of decoding should be used in adecoding process for the polar code.

In a control signal decoding process, if the decoding process can beearly terminated, the decoding latency and the power consumption mayboth be reduced. In an actual 5G communication system, a parity checkcode is used in the early termination of decoding for the polar code. InLiterature [1] (R1-1705757, NTT DOCOMO, “Distributed simple parity checkPolar codes,” 3GPP TSG RAN WG1 #88bis, Spokane, USA. 3-7 Apr. 2017, aparity check code for polar code that supports the early termination ofdecoding is proposed. First of all, data bits are equally divided into Pblocks (P is a positive integer greater than zero), and each block issubjected to a parity check coding to generate one parity check bit. Anith parity check bit pc_(i) may be generated by Equation (1) below:pc _(i)=Σ_(i=0) ^((i+1)K/P) ⊕u _(i) =u ₀ ⊕u ₁ ⊕ . . . ⊕u_((i+1)K/P)  (1)wherein it is assumed that there are K data bits and P parity checkbits, and ⊕ is an operational symbol in a binary addition.

For example, FIG. 1 is an example illustrating a coding configuration.Referring to FIG. 1, it is assumed that P is 3. The size of each blockin a coding process is almost equal (i.e., the data is almost equallydivided into three blocks). The first parity check bit pc₀ is generatedby a first data block (the data bits u₀ to u₇). The second parity checkbit pc₁ is generated by the first data block and a second data block(the data bits u₈ to u₁₅). The third parity check bit pc₂ is generatedby the first to third data blocks (the data bits u₀ to u₇, the data bitsu₈ to u₁₅ and the data bits u₁₆ to u₂₃). Each of the parity check bitspc₀ to pc₂ is related to all the data bits in front of the respectiveparity check bit. For example, the parity check bit pc₀ is generated byperforming the binary addition on eight bits (the data bits u₀ to u₇ inthe data block), and the parity check bit pc₁ is generated by performingthe binary addition on 16 bits (the data bits u₀ to u₇ in the data blockand data bits u₈ to u₁₅ in the data block).

In order to compare effects in the decoding methods for the earlytermination, an early termination percentage is defined here as shown inEquation (2) below. It is worth noting that the higher the earlytermination percentage, the better the effect of the early terminationof decoding:

$\begin{matrix}{{{Eearly}\mspace{14mu}{termination}\mspace{14mu}{percentage}} = \frac{{Total}\mspace{14mu}{of}\mspace{14mu}{early}\mspace{14mu}{termination}\mspace{14mu}{of}\mspace{14mu}{decoding}}{{Total}\mspace{14mu}{of}\mspace{14mu}{error}\mspace{14mu}{frames}}} & (2)\end{matrix}$

FIG. 2 is a schematic diagram illustrating a successive cancellationlist-based decoding for polar code with assistance of parity check coderepresented by a binary tree. Referring to FIG. 2, it is assumed that alist size is 4, and pc_(k) is a kth parity check bit (k is a positiveinteger). In the decoding process, the data bits u_(i−2), u_(i−1) andu_(i) are already passed, and a decoder is currently decoding the paritycheck bit pc_(k). At this point, the decoder will generate two decodingresults. Among two rows of numbers at a lower side of the figure, onerow shows the decoding results generated by the SCL-based decoder (i.e.,the numbers not marked at the lower side of the figure); the other rowshows the decoding results of the parity check code (i.e., the numbersmarked with an asterisk “*” in the figure). The four paths at the lowerside of the figure are known as survived paths, which are paths filteredby the SCL-based decoder. There are four survived paths when the listsize is set to 4. When encountering the parity check bit, the decodercompares the decoding results of the parity check code with the decodingresults of the four survived paths. If the decoding results are thesame, a parity check verification is passed, or else the parity checkverification is not passed. If all the survived paths of the decoderfail to pass the parity check verification, the decoding process isterminated, or else the decoding will continue. In the entire decodingprocess, all the survived paths are checked at a position of the paritycheck bit and this verification process is known as a decoding methodfor the early termination.

However, the decoding method for the early termination proposed inLiterature [1] performs the early termination of decoding only at theposition of the parity check bit. There is still room for improvement inthe early termination of decoding. Furthermore, since the position atwhich the parity check verification is performed is fixed, thecomplexity of the early termination of decoding cannot be reduced.Although a chance to achieve the early termination of decoding may beincreased by using more of parity check bits, they will result in alower code rate for the data.

SUMMARY

Accordingly, the embodiments of the disclosure provide a successivecancellation list (SCL)-based decoder and a decoding method thereof,which can increase the chance to achieve the early termination ofdecoding by adding extra error check bits without increasing the coderate.

The decoding method according to the embodiments of the disclosure isadapted to a successive cancellation list-based decoding, and includesthe following steps. An error check is performed on at least one databit. A data unit includes the data bit and at least one first check bit.One or more data bits are considered as at least one second check bit.Whether the error check is passed is checked at the second check bit.Then, whether to early terminate decoding of the data bit is determinedaccording to a result of the error check on the second check unit. Theresult of the error check is related to a comparison result between thecheck bit and a value determined by performing a function calculation oncorresponding data bits.

On the other hand, the decoder according to the embodiments of thedisclosure is adapted to a successive cancellation list-based decoding,and includes an error checker and an early termination determiningcircuit. The error checker performs an error check on at least one databit. A data unit includes the data bit and at least one first check bit.One or more data bits are considered as at least one second check bit.Whether the error check is passed is checked at the second check bit.The early termination determining circuit is coupled to the errorchecker, and determines whether to early terminate decoding of the databit according to a result of the error check on the second check unit.The result of the error check is related to a comparison result betweenthe first check bit and a value determined by performing a functioncalculation on corresponding data bits.

Based on the above, the decoder and the decoding method thereofaccording to the embodiments of the disclosure can consider a part ofall the positions of the data bits as the extra error checking positionsso that the decoding may be early terminated before the position of oneparticular check bit to improve the effect of the early termination ofdecoding and thereby reduce the decoding complexity.

To make the aforementioned more comprehensible, several embodimentsaccompanied with drawings are described in detail as follows.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a furtherunderstanding of the disclosure, and are incorporated in and constitutea part of this specification. The drawings illustrate embodiments of thedisclosure and, together with the description, serve to explain theprinciples of the disclosure.

FIG. 1 is an example illustrating a coding configuration.

FIG. 2 is a schematic diagram illustrating a successive cancellationlist-based decoding for polar code with assistance of parity check coderepresented by a binary tree.

FIG. 3 is a block diagram illustrating elements in a decoder accordingto an embodiment of the disclosure.

FIG. 4 is a flowchart of a decoding method according to an embodiment ofthe disclosure.

FIG. 5 is an example illustrating a determination of the earlytermination of decoding.

FIG. 6 is another example illustrating a determination of the earlytermination of decoding.

FIG. 7 is yet another example illustrating a determination of the earlytermination of decoding.

DESCRIPTION OF THE EMBODIMENTS

Reference will now be made in detail to the present preferredembodiments of the disclosure, examples of which are illustrated in theaccompanying drawings. Wherever possible, the same reference numbers areused in the drawings and the description to refer to the same or likeparts.

FIG. 3 is a block diagram illustrating elements in a decoder 100according to an embodiment of the disclosure. Referring to FIG. 3, thedecoder 100 includes, but not limited to, an error checker 110 and anearly termination determining circuit 130. The decoder 100 is applicableto a communication transceiver in various electronic devices (e.g., acell phone, a tablet computer or a smart watch).

The error checker 110 and the early termination determining circuit 130(coupled to the error checker 110) may be digital circuits composed ofone or more shifters, adders, registers, and/or multipliers, or may alsobe processing circuits such as processors, controllers, system on chips(SoCs), or integrated circuits (ICs).

In an embodiment of the embodiment, the error checker 110 is based on anerror check scheme for a parity check, which confirms whether the numberof values being 1 in binary data is odd or even. However, in otherembodiments, the error checker 110 may also adopt the error check schemelike checksum, cyclic redundancy check (CRC) or hash function, which arenot particularly limited by the disclosure.

On the other hand, the early termination determining circuit 130determines whether to terminate the decoding based on a path decision inthe successive cancellation list (SCL)-based decoding. For example, thedecision may be made by defining a log-likelihood ratio (LLR) value forthe next decoding codeword (a likelihood ratio of the probability oftransmitting 0 and the probability of transmitting 1 at a transmittingend). When the LLR value is greater than zero, it indicates that theprobability of transmitting 0 at the transmitting end is larger; whenthe LLR value is less than zero, it indicates that the probability oftransmitting 1 at the transmitting end is larger; when an absolute valueof the LLR value is close to zero, it indicates a channel condition isrelatively poor and a wrong determination can easily occur in this case.In an SCL algorithm, a likelihood value of a current codeword is givenby a likelihood value of the previous codeword according to a recursiveformula. It is assumed that an initial value of a path metric (PM) is 0.When the LLR value calculated by the early termination determiningcircuit 130 is greater than zero, the path of 0 is not processed, andthe LLR value of the path of 1 is accumulated and used as new pathmetric. When the LLR value calculated by the early terminationdetermining circuit 130 is less than zero, the path of 1 are notprocessed, and the LLR value of the path of 0 is accumulated and used asnew path metric. When a wrong and fixed codeword is selected by theearly termination determining circuit 130, the path metric is directlyset to a maximum value. It can be seen that a smaller path metric has ahigher reliability. The early termination determining circuit 130 startsa path search layer by layer from a root node of a binary decoding treeto a leaf node layer. After each layer is expanded, the earlytermination determining circuit 130 retains as many subsequent paths aspossible (the number of paths retained for each layer is not greaterthan a preset list length/size L (a positive integer greater thanzero)). Further, after the paths of one layer are expanded, the earlytermination determining circuit 130 selects L path with the smallest PMto be stored in a list, and waits for the expansion of the next layer.

It should be noted that, the decoder 100 may further include a decodingcircuit (not shown), and a decoding result of the decoding circuit forthe data unit is input to the error checker 110. It is also worth notingthat, the decoding circuit may decode the data unit encoded by the polarcode, and yet there may be other changes in an encoding type of the dataunit.

For better understanding of operating procedures in the embodiments ofthe disclosure, various embodiments are provided below and served todescribe the operating procedures of the decoder 100 in the embodimentsof the disclosure. In the following paragraphs, the method according tothe embodiments of the disclosure is described with reference to variouselements and circuits in the decoder 100. Each step in this method maybe adjusted based on the actual implementation, and the disclosure isnot limited thereto.

FIG. 4 is a flowchart of a decoding method according to an embodiment ofthe disclosure. Referring to FIG. 4, the error checker 110 receives databits and first check bits of decoded data unit, and performs an errorcheck on one more data bits (S410). Specifically, a decoding method forthe early termination adapted to a successive cancellation list-baseddecoder is proposed according an embodiment of the disclosure. It can beknown from the decoding method for the early termination proposed inLiterature [1] that the parity check is performed at the parity checkbit. In the embodiments of the disclosure, an error check verificationmay be further performed at specific positions to perform adetermination of early termination of decoding. In other words, in theembodiment of the disclosure, extra checking positions for the earlytermination of the decoding are added in the back of the positions ofthe first check bits. At the extra checking positions specificallyselected for the early termination of decoding, the error checkverification is performed on the check bits and the early termination ofdecoding is performed. In this way, compared to the approach in theLiterature [1], a higher chance to achieve the early termination ofdecoding may be provided.

If the polar code is applied, all the transmitted bits are divided intotwo sets including a frozen block and a data block. Among them, the bitsin the frozen block record known messages (e.g., all 0 or other values),and the bits in the data block may record the data bits, the check bitsand the cyclic redundancy check (CRC) bit bits.

Further, due to the characteristics of the successive cancellationlist-based decoding, the survived paths retained in the decoding processare sorted and filtered according to reliabilities of the paths. Inother words, the paths will be continuously updated, and the pathcurrently passed the error check may not be the survived path aftercertain data bits are decoded. For instance, there is a successivecancellation list-based decoder for the polar code, which has the listsize of four and adopts the parity check code as the decoding method forthe early termination. If two of the four survived paths pass the paritycheck verification performed at one specific parity check bit, thedecoding will continue. After multiple data bits are decoded, none ofthe four survived paths is one of the two paths which passed the paritycheck verification. In other words, the four survived paths are allsplit from the paths that did not pass the parity check verification. Inthis case, this decoding has a high probability of failure, so the earlytermination determining circuit 130 should determine to early terminatedecoding. Nonetheless, in the decoding method for the early terminationof Literature [1], the parity check verification is performed andwhether to perform the early termination is determined only whenproceeding to the position of the next parity check bit.

As described in the foregoing paragraphs, the method proposed by theembodiment of the disclosure is to improve a performance the earlytermination of decoding by the following two points. Firstly, in theapproach proposed by Literature [1], the parity check verification onthe paths is only performed at the position of the parity check bitbefore the early termination of decoding can have a chance of gettingstarted. However, in fact, the determination of the early termination ofdecoding may be performed at positions of any data bits in the back of afirst parity check bit. Therefore, because a time point at which thetraditional approach actives the early termination of decoding isrelatively late, the effect of the early termination of decoding isreduced. Secondly, the position of the parity check bit is fixed inLiterature [1] (e.g., the positions of the check bits are equallydistributed in the back of the three blocks as described in BACKGROUNDsection). As an experiment result, probabilities to achieve the earlytermination of decoding at the positions of the three parity check bitsare not particularly high. In other words, there is a higher probabilityof starting the early termination of decoding when the early terminationof decoding is determined at other data bits.

Based on the two points described above, in the embodiment of thedisclosure, the effect of the early termination of decoding can beimproved by adding the extra checking positions for the earlytermination of the decoding. In an embodiment, the data unit received bythe decoder 100 includes one or more data bits (e.g., a set of databits) and one or more first check bits. The data bits are used to recordvarious data or information. The first check bits are used to record avalue determined by performing a specific function calculation on thedata bits based on an error check method (e.g., the check bit of theparity check is a function for recording whether the number of thecorresponding data bits being 1 is odd or even (exclusive-OR (XOR)function) and the other functions may be hash, sum or the like). Thatis, the data bit is not the first check bit. It should be noted that,the error checker 110 selects a part or all the data bits in the dataunit as second check bits. Here, the second check bits are not used torecord that the value determined by performing the specific functioncalculation on the data bits, but used by the error checker 110 to checkwhether the error check is passed at the second check bits (i.e., theextra checking positions for the early termination of decoding).However, the second data bits are still used to record various data orinformation. On the other hand, the error checker 110 does not checkwhether the error check is passed at positions of those not consideredas the second check bits in the data.

It should be noted, a result of the error check is related to acomparison result between the check bit and a value determined byperforming a function calculation (based on a specific error checkscheme) on corresponding data bits. The comparison result may be thatthe two are the same (i.e., matched and passed) or the two are different(i.e., mismatched and not passed). For example, if a result of an XORoperation performed on the data bit is 1 and a decoded value of asubsequent parity check bit is 1, the error checker 110 determines thatthe error check is passed; otherwise, the error check is not passed.

If the data still uses the same position of the parity check bit inLiterature [1] (e.g., the data is divided into multiple blocks and theposition in the back of each block is used as the check bit), a simpleway to add the extra checking positions is to: in addition to all thefirst check bits, set all the data bits in the back of the position ofthe first one of first check bits as the check bits for the earlytermination of decoding (i.e., the second check bits). In other words,after the position of the first one of the first check bits is passed,in each decoding for the data bit, the error check verification isperformed and the determination of the early termination of decoding isperformed. Under such circumstance, because the determination isperformed at all possible positions of the bits where the earlytermination of decoding may occur, the probability of early terminationof decoding can be greatly increased, and the decoding can be earlyterminated at the earliest time.

However, if the determination of the early termination of decoding isperformed at all the possible positions of the bits where the earlytermination of decoding may occur, a large number of calculations arerequired and a decoding complexity is increased. Experimental resultsshow that the early termination of decoding will not be triggered at thepositions of most of the data bits. In other words, because events ofthe early termination of decoding occurring at these positions are rare,it is inefficient to consider all the data bits as the second checkbits. In order to select effective extra checking positions for theearly termination of decoding, an embodiment of the disclosure performsan analysis computation for reliabilities of the positions of the secondcheck bits, and accordingly finds out a relationship between the extrachecking positions for the early termination of decoding and the eventsof the early termination of decoding. The experimental results show thatthe probability of the early termination of decoding occurring at thedata bit with lower reliability is higher, and the early termination ofdecoding is less likely to occur at the data bit with higherreliability. The experimental results suggest that, by setting thepositions of bits among the data bits with lower reliability as theextra checking positions for the early termination of decoding (i.e.,the second check bits), the early termination of decoding may beperformed effectively.

In order to find the extra checking positions for the early terminationof decoding with lower reliability to be used as effective checkingpoints for the early termination of decoding, the error checker 110 canselect a part of the data bits in the data unit as the second check bitsaccording to chances of all the data bits in the data unit to achievethe early termination. In the embodiments of the disclosure, differentselecting methods, including Bhattacharyya and polarization weightmethods, may be adopted to calculate a probability at which an earlytermination event occurs for each of the data bits.

In an embodiment, the polarization weight method is adopted to selectthe extra checking positions for the early termination of decoding so asto improve the performance of the early termination of decoding sincethe polarization weight method is independent of a channelsignal-to-noise ratio (SNR), there is no need to consider channelconditions. In addition, by adding more of the extra checking positionsfor the early termination of decoding, the performance of the earlytermination of decoding can be closer to the performance of the earlytermination of decoding using all the possible extra checking positions.By selecting an appropriate amount of extra checking positions for theearly termination of decoding according to the embodiment of thedisclosure, the performance of the early termination of decoding may beimproved.

For instance, if the data has a code length of 256 bits and a code rateof 0.5, Table (1) and Table (2) list a comparison between differentselecting methods for the extra checking points and the approach ofLiterature [1].

TABLE (1) Second check All data bits Second check bits are selected areconsidered bits are using polarization as second not used weight checkbits The number of 3 10 + 3 73 + 3 effective checking positions

TABLE (2) SNR Second check bits are selected All data bits areconsidered (dB) using polarization weight as second check bits 0.5 42.2%43.3% 1.5 36.4% 37.2% 2.5 29.7% 30.1%

In Literature [1], three parity check bits are used, and their positionsare respectively positions of the 37th, 74th and 111th bits in a datasequence. Since the three parity check bits also trigger the earlytermination of decoding, three are added to the number of the secondcheck bits, and a sum between the two numbers is the number of effectivechecking positions. From Table (1), it can be concluded that if all thedata bits are considered as the second check bits, there will be a totalof 76 effective checking positions. 10 checking positions can beselected using the polarization weight, and there will be a total of 13effective checking positions.

On the other hand, from Table (2), early termination percentagesutilizing the different selection methods for the extra checking pointscan be derived. As shown in Table (2), when SNR is 0.5 db, the earlytermination percentage of the method using all the data bits is only1.1% higher than that of the method using the polarization weight. Inhigher SNR environments (1.5 dB and 2.5 dB), the early terminationpercentage of the method using all the data bits is approximately 1%higher than that of the selection method using the polarization weight.Such a result shows that the method proposed by the embodiment of thedisclosure can use the polarization weight to select a limited number ofeffective extra checking point positions (i.e., the second check bits),and can achieve better effect of the early termination of decodingsimply by increasing a computational complexity for a small number ofbits.

Referring back to FIG. 4, based on the aforementioned configuration ofthe second check bits, the early termination determining circuit 130 candetermine whether to early terminate decoding of the data bits in thedata according to a result of the error check on the second check bits(step S430). Specifically, after one specific data bit is decoded by thedecoder 100, if that specific data bit is the second check bit, theerror checker 110 then performs the error check verification. In anembodiment, the error checker 110 determines whether one or morepreviously checked first check bits match the value determined byperforming the function calculation on the corresponding data bits atthe second check bit. If the previously checked first check bits matchthe value determined by performing the function calculation on thecorresponding data bits (i.e., the previous error-check results areverified) at the second check bit in any of the survived paths, thedecoder 100 continues decoding of the rest of the data bits. On theother hand, if the previously checked first check bits mismatch thevalue determined by performing the function calculation on thecorresponding data bits (i.e., the error check verification is notpassed or not verified) at the second check bit in all of the survivedpaths, the early termination determining circuit 130 can terminatedecoding of the rest of the data bits.

In order to evaluate the effect of a mechanism for the early terminationof decoding on the SCL-based decoder, further analysis can be performedon the number of frames that are early terminated. The computationalcomplexity estimation method proposed in Literature [2] (R1-1709997,Huawei, HiSilicon, “Early termination for Polar code,” 3GPP TSG RAN WG1NR Ad-Hoc #2, Qingdao, China, 27-30 Jun. 2017) may be used to calculatea number of calculations saved by the proposed mechanism for the earlytermination of decoding. According to Literature [2], a computationalcomplexity ratio of the data block and the frozen block is set to 4:1.In other words, the decoding complexity of one data block is equivalentto the decoding complexity of four frozen blocks. Under the same numberof error frames, the numbers of calculations under the differentmechanisms for the early termination of decoding are calculated. Takingthe code length of 1024 and the code rate of 0.5 as an example, if theearly termination of decoding is not triggered in the decoding process,there will be 512 bits in the frozen block and 512 bits in the datablock in total, and the number of calculations is calculated as512+512*4=2560 computation units. In this way, when different SNRs arecounted, the number of calculations required for 100 sets of the errorframes is accumulated, and a ratio between a difference from the totalnumber of the calculations and an original number of calculations isused as a gain percentage. Taking SNR 0.5 dB as an example: the numberof calculations of the traditional early termination of decoding is107826 calculation units, an accumulated number of calculations of theproposed method for the early termination of decoding is 92829calculation units, and a method for calculating the gain of the earlytermination of decoding is (107826−92829)/107826=13.909%.

Compared with the decoding method for the early termination inLiterature [1], the method proposed by the embodiments of the disclosurecan further reduce the number of decoding calculations. Referring to theTable (3) below, as can be found in the mechanism for the earlytermination of decoding proposed by the embodiment of the disclosure, inthe case of the code length of 1024, the code rate of 0.5 and the listsize of 8, the number of calculations is reduced by 13% to 16% comparedto the decoding method for the early termination in Literature [1] ofthe conventional art.

TABLE (3) SNR Degree of complexity reduction 0.0(dB) 16.312% 0.5(dB)13.909% 1.0(dB) 13.182% 1.5(dB) 15.307% 2.0(dB) 15.260%

In order to assist the reader in understanding the spirit of theembodiments of the disclosure, three examples are further providedbelow. These examples provide a brief explain using the binary tree.Other than the positions of the parity check bits, a part of the databits are selected as the second check bits to perform the determinationof the early termination of decoding in the following embodiments of thedisclosure. First of all, it is assumed that a list length is 4, and thedecoder 100 has completed decoding of the data bits u₀, u₁ and hascompleted decoding of the parity check bits u₂, pc₀ and pc₁. It shouldbe noted that, the data bits u₃ and u₄ are not only the data bits butalso the extra checking positions for the early termination of decoding(i.e., the second check bits).

FIG. 5 is an example illustrating a determination of the earlytermination of decoding. Referring to FIG. 5, the error checker 110performs the parity check verification on the paths at the position ofthe first parity check bit pc₀. Because of the fact that at least onepath 501 (i.e., the survived path) passes the parity check verification,the decoding will continue. The early termination determining circuit130 performs a path deletion on each of dashed blocks in the binarytree. When encountering the parity check bit, the error checker 110performs a path selection and performs the parity check verification onthe survived paths. When encountering the second check bit, the errorchecker 110 performs the path selection and performs the parity checkverification on all the previously checked parity check bits at thesecond check bit. After the paths are split, since the list size is setto four, the early termination determining circuit 130 will select fourof the eight paths as the survived paths. When encountering the secondcheck bit, the error checker 110 performs the parity check verificationon all the survived paths. Under the condition that at least one of thesurvival paths passes the verification, the early terminationdetermining circuit 130 will determine that the decoding can continue.

FIG. 6 is another example illustrating a determination of the earlytermination of decoding. Referring to FIG. 6, a path passes a paritycheck verification at the first parity check bit pc₀ (corresponding to apath 601) and the decoding is currently being performed at a secondparity check bit pc₁. Since one path 603 in the survived paths passesthe parity check verification, the early termination determining circuit130 determines that the decoding can continue.

FIG. 7 is yet another example illustrating a determination of the earlytermination of decoding. Referring to FIG. 7, the decoder 100 startsdecoding by considering the data bit u₄ as the second check bit. As canbe seen from the figure, after a sorting phase, four survived paths 703are all split from paths that did not pass the parity check verification(only a path 701 can pass the verification). At the time, the earlytermination determining circuit 130 determines to early terminatedecoding at the data bit u₄. The early termination determining circuit130 checks whether the fourth paths pass the parity check verificationat the parity check bits pc₀ and pc₁ in front of the data bit u₄. If thefourth paths do not pass the parity check verification at one bit of theparity check bits pc₀ or pc₁, the early termination determining circuit130 then determines to early terminate decoding. That is, the decoder100 does not decode the rest of the data bits.

The above process illustrates that the embodiment of the disclosure canperform the error check verification by setting the extra checkingpositions for the early termination of decoding (i.e., the second checkbits, such as the data bits u₃ and u₄ in FIG. 7) and can perform theearly termination of decoding according to a checking result.

In summary, in addition to the determination of the early termination ofdecoding performed at the positions of the check bits for the errorcheck, the successive cancellation list-based decoder and the decodingmethod thereof according to the embodiments of the disclosure can alsoset the extra checking positions for the early termination of decodingat the specific data bits (i.e., the second checking bits) and performthe determination of the early termination of decoding. In addition, theeffect of architecture of the early termination of decoding according tothe embodiments of the disclosure is better than the conventionalarchitecture, the decoding may be early terminated in an earlierdecoding stage, and the power consumption may be reduced in hardwareimplementation.

It will be apparent to those skilled in the art that variousmodifications and variations can be made to the structure of the presentdisclosure without departing from the scope or spirit of the disclosure.In view of the foregoing, it is intended that the present disclosurecover modifications and variations of this disclosure provided they fallwithin the scope of the following claims and their equivalents.

What is claimed is:
 1. A decoding method, adapted to a successivecancellation list (SCL)-based decoding, the decoding method comprising:providing a data unit, wherein the data unit comprises a plurality ofdata bits and at least one first check bit; determine a change of eachof the plurality of data bits in the data unit to achieve an earlytermination through Bhattacharyya or polarization weight; selecting asecond check bit from the plurality of data bits in the data unitaccording to the changes of all the plurality of data bits in the dataunit to achieve the early termination; in response to the second checkbit being selected, performing an error check on the second check bit,wherein whether the error check is passed is checked at the second checkbit; and determining whether to early terminate decoding of theplurality of data bits according to a result of the error check at thesecond check bit, wherein the result of the error check is related to acomparison result between the at least one first check bit and a valuedetermined by performing a function calculation on corresponding databits.
 2. The decoding method according to claim 1, wherein the step ofdetermining whether to early terminate decoding of the at least oneplurality of data bits according to the result of the error check on theat least one second check bit comprises: in response to at least onepreviously checked first check bit mismatching the value determined byperforming the function calculation on the corresponding data bits atone of the at least one second check bit, terminating decoding of the atleast one plurality of data bits; and in response to at least onepreviously checked first check bit matching the value determined byperforming the function calculation on the corresponding data bits atone of the at least one second check bit, continuing decoding of therest of the at least one plurality of data bits.
 3. The decoding methodaccording to claim 1, wherein the error check is based on a paritycheck.
 4. A decoder adapted to a successive cancellation list-baseddecoding on a data unit, the decoder comprising: an error checker,determining a change of each of a plurality of data bits in the dataunit, which further comprises at least one first check bit, to achievean early termination through Bhattacharyya or polarization weight,selecting a second check bit from the plurality of data bits in the dataunit according to the changes of all the plurality of data bits in thedata unit to achieve the early termination, and performing an errorcheck on the second check bit in response to the second check bit beingselected, wherein whether the error check is passed is checked at thesecond check bit; and an early termination determining circuit, coupledto the error checker, and determining whether to early terminatedecoding of the plurality of data bits according to a result of theerror check at the second check bit, wherein the result of the errorcheck is related to a comparison result between the at least one firstcheck bit and a value determined by performing a function calculation oncorresponding data bits.
 5. The decoder according to claim 4, wherein inresponse to at least one previously checked first check bit mismatchingthe value determined by performing the function calculation on thecorresponding data bits at one of the second check bit, the earlytermination determining circuit terminates decoding of the plurality ofdata bits; and in response to at least one previously checked firstcheck bit matching the value determined by performing the functioncalculation on the corresponding data bits at one of the second checkbit, the decoder continues decoding of the rest of the plurality of databits.
 6. The decoder according to claim 4, wherein the error check isbased on a parity check.